
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 43
TABLE 8-3
RESET CONDITION FOR PROGRAM COUNTER AND THE STATUS REGISTER
Condition
Program Counter
STATUS Register
Power-on Reset
000h
0001 1xxx
MCLR Reset during normal operation
000h
000u uuuu
MCLR Reset during SLEEP
000h
0001 0uuu
WDT Reset (during normal operation)
000h
0000 1uuu
WDT Wake-up
PC + 1
uuu0 0uuu
Interrupt wake-up from SLEEP
PC + 1 (1)
uuu1 0uuu
Legend: u = unchanged, x = unknown.
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
TABLE 8-4
RESET CONDITIONS FOR ALL REGISTERS
Register
Address
Power-on Reset
MCLR Reset during:
– normal operation
– SLEEP
WDT Reset during nor-
mal operation
Wake-up from SLEEP:
– through interrupt
– through WDT Time-out
W
—
xxxx xxxx
uuuu uuuu
INDF
00h
---- ----
TMR0
01h
xxxx xxxx
uuuu uuuu
PCL
02h
0000h
PC + 1
(2)
STATUS
03h
0001 1xxx
000q quuu
(3)
uuuq quuu
(3)
FSR
04h
xxxx xxxx
uuuu uuuu
PORTA
05h
---x xxxx
---u uuuu
PORTB
06h
xxxx xxxx
uuuu uuuu
EEDATA
08h
xxxx xxxx
uuuu uuuu
EEADR
09h
xxxx xxxx
uuuu uuuu
PCLATH
0Ah
---0 0000
---u uuuu
INTCON
0Bh
0000 000x
0000 000u
uuuu uuuu
(1)
INDF
80h
---- ----
OPTION_REG
81h
1111 1111
uuuu uuuu
PCL
82h
0000h
PC + 1
STATUS
83h
0001 1xxx
000q quuu
(3)
uuuq quuu
(3)
FSR
84h
xxxx xxxx
uuuu uuuu
TRISA
85h
---1 1111
---u uuuu
TRISB
86h
1111 1111
uuuu uuuu
EECON1
88h
---0 x000
---0 q000
---0 uuuu
EECON2
89h
---- ----
PCLATH
8Ah
---0 0000
---u uuuu
INTCON
8Bh
0000 000x
0000 000u
uuuu uuuu
(1)
Legend: u = unchanged,
x
= unknown,
-
= unimplemented bit read as '0',
q
= value depends on condition.
Note 1: One or more bits in INTCON will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3:
Table 8-3 lists the reset value for each specific condition.